Important Questions and Answers on Computer Organization and Embedded Systems – Part 2

1. Memory

What is memory?

Memory in computers is a system that encodes, stores, and retrieves data or instructions as bits (0s and 1s). It includes components like RAM, cache, and hard drives, enabling the processor to access and process information efficiently.

What is Cache Memory?

Cache memory increases the accessing speed of the CPU. It is not a technique but a memory unit a storage device. In cache memory, recently used data is copied. Whenever the program is ready to be executed, it is fetched from the main memory and then copied to the cache memory. But, if its copy is already present in the cache memory then the program is directly executed.

What is Virtual Memory?

Virtual Memory increases the capacity of main memory. Virtual memory is not a storage unit, its a technique. In virtual memory, even such programs which have a larger size than the main memory are allowed to be executed.

Differences between cache and virtual memory?

Virtual Memory	Cache Memory
Virtual memory increases the capacity of main memory.	While cache memory increase the accessing speed of CPU.
Virtual memory is not a memory unit, its a technique.	Cache memory is exactly a memory unit.
The size of virtual memory is greater than the cache memory.	While the size of cache memory is less than the virtual memory.
Operating System manages the Virtual memory.	On the other hand hardware manages the cache memory.
In virtual memory, the program with size larger than the main memory are executed.	While in cache memory, recently used data is copied into.
It is not as speedy as cache memory.	It is a fast memory.

 source: source: https://www.geeksforgeeks.org/computer-organization-architecture/cache-memory-in-computer-organization

Internal organization of memory chip 16×8

 

 

 

Differences between SRAM and DRAM

Parameter	SRAM	DRAM
Full Form	SRAM stands for Static Random Access Memory.	DRAM stands for Dynamic Random Access Memory.
Component	SRAM stores information with the help of transistors.	DRAM stores data using capacitors.
Need to Refresh	In SRAM, capacitors are not used which means refresh is not needed.	In DRAM, contents of a capacitor need to be refreshed periodically.
Speed	SRAM provides faster speed of data read/write.	DRAM provides slower speed of data read/write.
Power Consumption	SRAM consumes more power.	DRAM consumes less power.
Data Life	SRAM has long data life.	DRAM has short data life.
Cost	SRAM are expensive.	DRAM are less expensive.
Density	SRAM is a low density device.	DRAM is a high density device.
Usage	SRAMs are used as cache memory in computer and other computing devices.	DRAMs are used as main memory in computer systems.

 Read/write operation of Static RAM cell:

Figure 1:A static RAM cell

Write operation:

An SRAM cell consists of two inverters cross-connected to each other and two transistors connected to the bit lines. When we want to write data, the value to be written is placed on the bit lines and the word line is activated. When the word line is activated, the transistors turn on, allowing the signal from the bit lines to enter the internal latch. This signal sets the inverters to the new value, and even after the word line is turned off, the value is retained.

Read operation:

When reading data, the bit lines are pre-charged to an equal voltage. After that, when the word line is activated, the transistors turn on, and the value stored in the latch slightly changes the voltage on the bit lines. A sense amplifier detects this small voltage change and determines whether the cell stores a 1 or a 0. Once the read is complete, the word line is turned off, and the value in the memory cell remains unchanged

Read/write operation of Dynamic RAM cell:

Write operation:

• Each DRAM cell contains one transistor and one capacitor.
• When writing data, the word line is activated, turning on the transistor.
• The data bit is written by either charging the capacitor (to store a “1”) or discharging it (to store a “0”) through the bit line.

Read Operation

• During reading, the word line is activated again, and the transistor turns on.
• The sense amplifier detects whether the capacitor is charged (1) or discharged (0).

2. Basic processing unit

Steps of Basic Operation of a Instruction, execution into CPU

·        Read the contents of a given memory location and load them into a processor register.

·        Read data from one or more processor registers.

·        Perform an arithmetic or logic operation and place the result into a processor register.

Instruction execution of CPU:

i) Load

Load R5, X(R7)

Execution of this instruction involves the following actions:

• Fetch the instruction and increment the program counter.
•  Decode the instruction and read the contents of register R7
• Add the offset X to the content
• Go to memeory at that computed address
• Copy the data from memory into register R5

ii)Arithmetic and Logic instruction:

Add R3, R4, R5

It requires the following steps:

1.    1. Fetch the instruction and increment the program counter.
2. Decode the instruction and read the contents of source registers R4 and R5.
3. Compute the sum [R4] + [R5].
4. Load the result into the destination register, R3.

iii) Store Instruction:

Store R6, X(R8)

1 iIt can be implemented as follows:

       1.Fetch the instruction and increment the program counter. 

       2.Decode the instruction and read registers R6 and R8.

       3. Compute the effective address X + [R8].

        4. Store the contents of register R6 into memory location X + [R8].

Description of ALU with circuit diagram:

The Arithmetic and Logic Unit (ALU) performs arithmetic (addition, subtraction) and logic (AND, OR, XOR) operations to manipulate data. When such an instruction is executed, two registers specified in the instruction are read from the register file and appear at outputs A and B. Output A connects directly to ALU input InA, while output B passes through a multiplexer (MuxB), which selects either the register output or an immediate value from the Instruction Register (IR) for ALU input InB. The ALU’s output is connected to the data input C of the register file, enabling the computed result to be stored in the destination register.

Write down Five Stage of Datapath in a Processor with Diagram.

• ·        Stage 1: instruction fetch
• ·        Stage 2: Source register
• ·        Stage 3: ALU
• ·        Stage 4: Memory access
• ·        Stage 5: Destination Register